My take on the Gartner Hype Cycle | by Jens Møllerhøj | Medium
Analog architectures for neural network acceleration based on non-volatile memory: Applied Physics Reviews: Vol 7, No 3
How to make your own deep learning accelerator chip! | by Manu Suryavansh | Towards Data Science
Deep Neural Network ASICs The Ultimate Step-By-Step Guide eBook : Blokdyk, Gerardus: Amazon.in: Kindle Store
How to make your own deep learning accelerator chip! | by Manu Suryavansh | Towards Data Science
Processing AI at the Edge: GPU, VPU, FPGA, ASIC Explained - ADLINK Blog
FPGA Based Deep Learning Accelerators Take on ASICs
FPGA Based Deep Learning Accelerators Take on ASICs
Space-efficient optical computing with an integrated chip diffractive neural network | Nature Communications
Review of ASIC accelerators for deep neural network - ScienceDirect
Hardware for Deep Learning. Part 4: ASIC | by Grigory Sapunov | Intento
Google AI Blog: Chip Design with Deep Reinforcement Learning
Deep learning on mobile devices: a review
ASIC Design Services | Microsemi
My take on the Gartner Hype Cycle | by Jens Møllerhøj | Medium
An on-chip photonic deep neural network for image classification | Nature
8-Bit Precision for Training Deep Learning Systems | IBM Research Blog
Arch-Net: A Family Of Neural Networks Built With Operators To Bridge The Gap Between Computer Architecture of ASIC Chips And Neural Network Model Architectures - MarkTechPost
Deep Learning in Mining Biological Data | SpringerLink
How to develop high-performance deep neural network object detection/recognition applications for FPGA-based edge devices - Blog - Company - Aldec
FPGA vs GPU for Machine Learning Applications: Which one is better? - Blog - Company - Aldec
Embedded Machine Learning
Are ASIC Chips The Future of AI?
Deep Learning Accelerators Foundation IP| DesignWare IP| Synopsys
The Great Debate of AI Architecture | Engineering.com
