This happens to be a negative edge triggered JK flip flop. I used boolean algebra and found D = E' and E = D'. Given the propagation delay I thought this was
Boolean gate based negative edge-triggered D flip-flop. | Download Scientific Diagram
Design of positive & negative edge triggered D-flip flop using AlGaAs/GaAs MODFET technology | Semantic Scholar
Boolean gate-based negative edge-triggered D flip-flop. | Download Scientific Diagram
Solved Referring to the negative-edge triggered D flip-flop | Chegg.com
Negative-Edge-Triggered T Flip-Flop
digital logic - Is there an intuitive explanation of the classic edge-triggered flip flop circuit? - Electrical Engineering Stack Exchange
Introduction to Flip-Flops - luisdanielhernandezengineeringportfolio
Master Slave D Flip Flop – Positive or Negative Edge Triggered? | allthingsvlsi
Master Slave Flip - an overview | ScienceDirect Topics
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Sequential Logic and Flip Flops Sequential Logic Circuits
Solved QUESTION 1 Referring to the positive-edge triggered D | Chegg.com